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(Created page with "This is from Josh Malone, posted to the m100 mail list: As I stated in the other thread, I got the CPLD programmed in another REX board. This was my first time using the Xili...") |
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Josh Malone posted to the m100 mail list: | |||
As I stated in the other thread, I got the CPLD programmed in another | "As I stated in the other thread, I got the CPLD programmed in another | ||
REX board. This was my first time using the Xilinx labtools in Win 10 | REX board. This was my first time using the Xilinx labtools in Win 10 | ||
and it didn't work out-of-the-box. Luckily, there's a good recipe for | and it didn't work out-of-the-box. Luckily, there's a good recipe for | ||
| Line 9: | Line 9: | ||
http://www.eevblog.com/forum/microcontrollers/guide-getting-xilinx-ise-to-work-with-windows-8-64-bit/ | http://www.eevblog.com/forum/microcontrollers/guide-getting-xilinx-ise-to-work-with-windows-8-64-bit/ | ||
Just in case anybody needs this. | Just in case anybody needs this." | ||
<hr> | |||
1) Aquire a Xilinx usb programmer | |||
:https://www.ebay.com/itm/112073269777 | |||
2) Install Xilinx "Lab Tools" to get the usb programmer drivers and the iMPACT program. | |||
:On the Xilinx web site, go to Support -> Downloads -> ISE | |||
:Optionally click "14.7" instead of "14.7 (Windows 10)" on the left | |||
:Scroll down to "Lab Tools - 14.7 Utilities" | |||
:You will need to register an account to download. | |||
:https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools/v2012_4---14_7.html | |||
: -> https://www.xilinx.com/member/forms/download/xef-ise.html?filename=Xilinx_LabTools_14.7_1015_1.tar | |||
3) Connect the usb programmer and a power source to the REX. | |||
*You'll need a 6x1 single row double ended pin header with long pins on both sides, like one of these: | |||
::https://www.digikey.com/product-detail/en/sullins-connector-solutions/PRPC006SACN-RC/S1131EC-06-ND/2776100 | |||
::https://www.digikey.com/product-detail/en/sullins-connector-solutions/PRPC006SBCN-M71RC/S1132EC-06-ND/2776180 | |||
*You'll need a way to supply +5vdc to pin #1 on the edge of the REX, and GND to pin #14 on the edge of the REX | |||
*You'll need a jumper wire with a j-clip or mini-grabber test clip on one end and a male pin on the other end, to temporarily jump Vref (Vcc, 3.3vdc) to PORT_EN. PORT_EN is the Xilinx side of resistor R1. Be VERY careful not to touch the other side of R1!!! Get the jumper connection ready, but don't actually touch R1 until the last second when you are ready to actually press "Program" in iMPACT. Then, hold it connected until iMPACT says success. | |||
4) Use iMPACT to program the .jed file to the cpld. | |||
:http://www.tiaowiki.com/w/Program_Xilinx_XC2C64A_Or_Similar_Xilinx_CPLD_Using_TIAO_Universal_JTAG_Cable#Launch_iMPACT | |||
Latest revision as of 22:44, 18 June 2019
Josh Malone posted to the m100 mail list:
"As I stated in the other thread, I got the CPLD programmed in another REX board. This was my first time using the Xilinx labtools in Win 10 and it didn't work out-of-the-box. Luckily, there's a good recipe for dealing with this. ISE isn't supported anymore and isn't supposed to work in Win10, but a quick DLL swap seemed to get it working for me:
Just in case anybody needs this."
1) Aquire a Xilinx usb programmer
2) Install Xilinx "Lab Tools" to get the usb programmer drivers and the iMPACT program.
- On the Xilinx web site, go to Support -> Downloads -> ISE
- Optionally click "14.7" instead of "14.7 (Windows 10)" on the left
- Scroll down to "Lab Tools - 14.7 Utilities"
- You will need to register an account to download.
- https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools/v2012_4---14_7.html
- -> https://www.xilinx.com/member/forms/download/xef-ise.html?filename=Xilinx_LabTools_14.7_1015_1.tar
3) Connect the usb programmer and a power source to the REX.
- You'll need a 6x1 single row double ended pin header with long pins on both sides, like one of these:
- You'll need a way to supply +5vdc to pin #1 on the edge of the REX, and GND to pin #14 on the edge of the REX
- You'll need a jumper wire with a j-clip or mini-grabber test clip on one end and a male pin on the other end, to temporarily jump Vref (Vcc, 3.3vdc) to PORT_EN. PORT_EN is the Xilinx side of resistor R1. Be VERY careful not to touch the other side of R1!!! Get the jumper connection ready, but don't actually touch R1 until the last second when you are ready to actually press "Program" in iMPACT. Then, hold it connected until iMPACT says success.
4) Use iMPACT to program the .jed file to the cpld.